The present invention relates generally to process reactors used in fabricating semiconductor devices and, more particularly, to the control of the plasma temperature within the process reactor for improved reactor fabrication and maintenance operations.
Plasma process reactors are used for both etching and depositing material on the surface of the semiconductor substrate. In either case, a gas is injected into the chamber of the process reactor where it is ionized into a plasma for either etching or reacting with the surface of the semiconductor substrate to form a desired pattern thereon. It is important to control the gas distribution into the reactor as well as to control the temperature of the gas in forming the plasma. Process reactors often use a thermally isolated dielectric plate to control the gas distribution into the reactor. The gases are injected into the chamber on the backside of the dielectric plate and pass through gas inlet holes in the plate to get into the reaction zone.
The plate is thermally isolated because a backside gap is required to allow the process gases to flow behind the plate to the gas inlet holes. This makes the plate temperature and gas temperature difficult to control as the process puts a heat load on the plate.
Attempts have been made to control the temperature by controlling the temperature of the dielectric plate. Methods of adjusting or controlling the temperature have been performed by adjusting the backside gap to be as small as possible, by controlling the temperature of the reactor wall located behind it, or by cooling the dielectric plate, or any combination of the three. The heat transfer between the plate and the temperature control reactor wall occurs by conduction of the process gas as it flows through the narrow gap. The gas pressure, and not its flow rate, controls how much heat is transferred between the two surfaces. The plate temperature is controlled by the gas pressure, the reactor wall temperature, and the heat load on the plate from the process chamber.
A sample plasma process reactor 10 is depicted in the schematic diagram of FIG. 1. Plasma process reactor 10 includes a plasma chamber 12 in which is positioned a substrate holder 14. A semiconductor substrate 16 is placed on substrate holder 14. A bias voltage controller 18 is coupled to substrate holder 14 in order to bias the voltage to counter the charges building up on semiconductor substrate 16. An etching gas is provided through gas inlet 20, which is ionized by inductor back side 22. Placed upon inductor back side 22 is a plurality of inductor elements 24 that is controlled by a current 26. Current 26 causes an induction current to flow that generates an ionizing field on the interior surface of inductor back side 22. The plasma then passes through a gas distribution plate 28, which is held in place with a vacuum seal via O-ring 30, allowing a gas to pass through a plurality of apertures 32. A second O-ring 34 is placed between the inductor back side 22 and gas distribution plate 28. A vacuum is created by a vacuum pump 36 for evacuating material and pressure from plasma chamber 12. A control gate 38 is provided to allow a more precise control of the vacuum as well as the evacuated material. An outlet 40 removes the material from the vacuum for disposal.
In this example, gas distribution plate 28 is made of a silicon nitride material. In certain desired oxide etch processes, it is required that the gas distribution plate 28 be cooled below 80xc2x0 C. This cooling is accomplished by cooling the reactor wall of plasma chamber 12 and is sometimes called a window in this plasma etch reactor. The reactor wall is cooled to about 20xc2x0 C. and the process gas is run through the backside gap. Unfortunately, the temperature of the plate 28 cannot be easily modified in this arrangement. The inability to control the temperature causes other problems during different stages of use of the process reactor.
One problem is that cleaning of the interior cannot be easily performed since the temperature is fixed as the gas distribution plate is thermally coupled to the reactor wall during cleaning. It is helpful to run the cleaning process at much higher temperatures than during the etching process, but such an effective cleaning temperature cannot be achieved since the temperature is controlled by the constant gas flow at the gas distribution plate. Another problem is that process modifications cannot be performed since only a set maximum temperature is possible and no higher temperature is available that would allow different processes to be performed that require hotter temperatures than those otherwise possible in a fixed-temperature reactor.
Accordingly, what is needed is a method and apparatus that overcome the prior problem of being unable to vary the temperature range of the process reactor for providing greater control over the process occurring in the processor reactor. The inability to vary the temperature range also hinders the cleaning ability of the reactor.
According to the present invention, a plasma process reactor is disclosed that allows for greater control in varying the functional temperature range for enhancing semiconductor processing and reactor cleaning. The temperature is controlled by splitting the process gas flow from a single gas manifold that injects the process gas behind the gas distribution plate into two streams where the first stream goes behind the gas distribution plate and the second stream is injected directly into the chamber. By decreasing the fraction of flow that is injected behind the gas distribution plate, the temperature of the gas distribution plate can be increased. The increasing of the chamber temperature results in higher O2 plasma cleaning rates of the deposits on the hotter surfaces. Additionally, where other processes would benefit from warmer gas distribution temperatures, the high gas flow allows higher temperatures to be achieved over the non-split flow of the prior art.